it can be seen from Fig. 3(c), output voltage Vol of inverter no. 1 lags behind current Io by an angle 0/2 and output voltage Fo2 leads current Io by the same angle. Therefore, the output resistive load appears as a capacitive power factor load for inverter no. 1 and as an inductive power factor load for inverter no. 2. Since both the inverters see a different type of output load they draw unequal currents (Zsl and Zs2) at their inputs. The unequal currents cause greater heating of one inverter than the other and forces the inverter system to operate at reduced power output in order to reduce the excessive heating. The unbalanced currents can also cause a potential commutation failure for the inverters under certain load conditions [5]. 3.2.2 Pulse Width Modulation Control. In pulse width modulated control of the DC/AC resonant inverters, the gating pulses generated by the control circuit turn-on and turn-off the power semi-conductor switches of the inverter in such a fashion that a quasi-square voltage Vs appears at the input of the output resonant network (Fig. 4(a)). The resonant network filters out the harmonics to an acceptable level and produces a close to sinusoidal output voltage Vo. The output voltage of the inverter is approximately given by: Ko=0.97< E. sin 3/2 (3.2) where K is a gain factor of the inverter, E, is the input DC voltage and 3 is the pulse width angle.
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