6. To investigate the performance impact of reducing the thickness of the epitaxial layer. To implement these objectives a matrix plan for diode fabrication was derived, as shown in Figure 4- 2 . Figure 4<»*2 indicates various kinds of diodes that result from such a construction matrix. The matrix produces 16 different kinds of diodes from each wafer. Two diodes of each kind, or a total of 3 2 diodes from each wafer, were generally made available for testing. A brief description of the manufacturing sequence may be of interest. The epitaxially grown surface of each wafer was covered with a material resistive to etching. The resistive coating from a portion of the wafer was then removed, and the thickness of the epitaxial layer was reduced by the application of an etch. Then the resistive coating was removed from another area, and the etch was applied to both areas. Then the resistive coating was removed from a third area, and the etch was applied to all three exposed areas. In this manner, the four different thicknesses of the epitaxial layer corresponding to the designations A, B, C and D on Figure 4-2 were established. The designation A corresponds to the unetched portion of the wafer. The wafer was then divided into two parts. Tungsten was deposited as an interface with the epitaxially grown active area on one part while platinum was deposited on the other part. A heat sink in the form of a gold-plating deposit about three mils thick was then attached to the metallic deposition and was lapped down to flatness. Then most of the substrate was removed by grinding. An ohmic contact was made on the back of each piece of material. A photomask technique was used to define the area occupied by the ohmic contact for each individual diode. After the etching process, the ohmic contact was about six mils in diameter. The mesa of the diode was then defined and etched to a diameter of about eight mils. The diodes were then separated from each other by an etch applied to the outboard side of the heat sink. After etching and diode separation each heat sink was about twenty by twenty mils in size. The individual diodes were then mounted by a brazing technique to the package heat sink. The diode mesas of half of the assembled units were then subjected to an etching process until the zero-bias capacitance was close to 3. 7 picofarads. The remainder were etched down to a value of about 1 picofarad. 4. 2 Life Test on Rectenna Elements and Diodes Prior to the work undertaken under this contract there had been a life test started on rectenna elements and diodes utilizing the 199 element rectenna array development under an earlier MSFC contract. Because of the importance of the information being obtained from the life test, the life test was continued. Although the work was not a portion of the present contractural effort a summary of the results of the life test are being included here for documentation and reference purposes.
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